1. Field of the Invention
The present invention relates to a sound signal processing apparatus. More specifically, the present invention relates to an improvement in a sound signal processing apparatus wherein the ratio of the frequencies of a sampling pulse and a read clock pulse is made changeable and a sound signal is sampled as a function of the sampling pulse and the sampled data is stored in a memory and the data stored in the memory is read as a function of the read clock pulse, whereby the frequency of the sound signal is converted with the information maintained.
2. Description of the Prior Art
In recording and reproducing a sound signal using a recording medium such as a tape recorder, for example, it is often desired that the reproducing speed is different from the recording speed. In such a case, the frequency component of the sound signal as reproduced is varied as a function of the ratio Vp/Vr of the reproducing speed Vp and the recording speed Vr as a matter of course. More specifically, a frequency component x(f) of the sound signal becomes Vp/Vr.multidot.x{(Vr/Vp)f}; however, when the ratio Vp/Vr becomes large, the sound signal becomes hard to understand or can hardly be understood, because of degraded articulation. Therefore, necessity arises in which the frequency of the sound signal remains unchanged, in other words, the pitch of the sound remains unchanged, even if the reproducing speed is changed so that the reproduction time may be prolonged or shortened. An apparatus for achieving the above described purpose has been proposed and is generally referred to as a time axis compressing/expanding apparatus. In such time axis compressing/expanding apparatus, the reproducing speed Vp and the recording speed Vr specifically mean the traveling speed (cm/sec) of a magnetic tape as for a tape recorder and the revolution number rpm of a record as for a disc record.
FIG. 1 is a block diagram for explaining the principle of correcting or changing the time axis. FIGS. 2A to 2E are graphs showing waveforms for the same purpose. Now the principle of correcting the time axis will be described. When an original signal shown in FIG. 2A is reproduced at a low speed by means of a tape recorder, a sound signal having the time axis changed as shown in FIG. 2B is obtained. When this sound signal as such is withdrawn, the sound is heard with a changed pitch and therefore in order to attain the same pitch, the time axis is compressed as shown in FIG. 2C while the same signal is partially repeated. To that end, a sound signal with the time axis changed is applied to an input terminal 1 and is sampled as a function of a sampling pulse of the frequency f1 obtained from a clock pulse generator, whereupon the sampled data is stored in a memory 3. The sampled data as stored undergoes repetitious reading of the same signal, in part, as a function of a read clock pulse of the frequency f2 obtained from the clock pulse generator 2, whereupon the read output is obtained from an output terminal 5 through a low-pass filter 4. Similarly, a sound signal as high speed reproduced as shown in FIG. 2D may be converted to a signal of the same frequency as the original signal by throwing away appropriate portions in the waveform shown in FIG. 2D and by connecting the waveforms by expanding the time axis as shown in FIG. 2E. In doing so, by selecting the ratio of the above described clock frequencies f1 and f2 to be equal to the reproducing speed ratio Vp/Vr, i.e., EQU f1/f2=Vp/Vr (1)
the time axis of the sound signal at the input terminal 1 is corrected so that a reproducing signal having the same frequency component as that of the original signal is obtained at the output terminal 5. To that end, the speed ratio signal is supplied from the terminal 6 to the clock pulse generator 2 in order to produce the sampling pulse of the frequency f1 and the read clock pulse of the frequency f2 so as to meet the above described equation (1).
A circuit for storing the sampled data of the sound signal may comprise a bucket brigade device (or BBD), a charge coupled device (or CCD), an analog memory such as a capacitor memory, a digital memory such as a random access memory, or the like. Meanwhile, the low-pass filter 4 provided at the output of the FIG. 1 circuit serves to eliminate a high frequency signal component contained in a series of the sampled data, thereby to extract only a sound signal component.
On the other hand, according to the sampling theory, a desired reproducing signal frequency region is determined by the frequency f2 of the read clock and becomes lower than a half of the clock frequency f2. Therefore, in order to meet the above described equation (1), one might think of an approach in which the frequency f2 of the read clock pulse is set to a predetermined value in association with the frequency region of the reproducing signal while the frequency f1 of the sampling pulse is changed in association with the speed ratio signal. However, a problem arises as set forth in detail subsequently, when the frequency f1 of the sampling pulse is increased.
FIG. 3 is a block diagram showing an outline of a conventional time axis compressing/expanding circuit. FIGS. 4A, 4B and 4C are graphs showing spectrum distribution of a PCM signal in the sampled data series.
Now a structure and an operation of the time axis compressing/expanding circuit will be described. A sound signal is applied through an input terminal 1 to a low-pass filter 7. The low-pass filter 7 serves to restrict the frequency band of the applied sound signal. The sound signal which passed through the low-pass filter 7 is applied to an analog/digital converter 8. The analog/digital converter 8 is also connected to receive a sampling pulse from a clock pulse generator 21. The analog/digital converter 8 comprises a sample hold circuit so that the sound signal may be sampled to be converted into a digital signal, which is then applied to a random access memory 95. A clock pulse generator 21 may comprise a voltage controlled oscillator the oscillation frequency of which is changeable as a function of a voltage set by a variable resistor 11, for example. Meanwhile, the variable resistor 11 may be shared as a control voltage generator for generating a control voltage for controlling the speed of a reproducing motor 12 of a tape recorder, for example. The sampling pulse obtained from the clock pulse generator 21 is also applied to an address counter 91 and a read/write switch 93. The address counter 91 serves to designate the write address of the random access memory 95 and provides an address signal to a multiplexer 94. The read/write switch 93 serves to control a write or read operation of the random access memory 95. To that end, the read/write switch 93 provides a read/write signal to the multiplexer 94 and random access memory 95. The multiplexer 94 provides an address signal from the address counter 91 to the random access memory 95 in the write mode. Accordingly, the random access memory 95 is stored with the sampled data obtained by sampling the sound signal by the analog/digital converter 8.
A clock pulse generator 22 at the read side serves to generate a read clock pulse having the fixed frequency f2 and the read clock pulse is applied to a digital/analog converter 10, an address counter 92, and a read/write switch 93. The address counter 92 serves to count the read clock pulse to designate the read address of the random access memory 95 and to that end the address signal is applied to the multiplexer 94. The read/write switch 93 provides a read control signal to the multiplexer 94 and the random access memory 95 in a read mode. Accordingly, the random access memory 95 is responsive to the read control signal and the read address signal to read the sampled data. The sampled data, as read, is applied to the digital/analog converter 10. The digital/analog converter 10 serves to convert the sampled data to an analog signal as a function of the read clock pulse. The analog signal is applied to a low-pass filter 4 for removal of a high frequency component and the output is obtained from the output terminal 5.
The above described time axis compressing/expanding circuit is adapted such that a control voltage is set by means of the variable resistor 11 so that the reproducing speed by the reproducing motor 12 may be the same as the recording speed, the frequency f1 of the sampling pulse obtained from the clock pulse generator 21 may be equal to the frequency f2 of the read clock obtained from the clock pulse generator 22 as a function of the above described control voltage, and various characteristics are set so that the speed variation of the reproducing motor 12 with respect to the above described control voltage may be always equal to the variation of the frequency f1 of the sampling pulse. Then, it follows that the previously described equation (1) is met with respect to the frequency f1 of the sampling pulse and the frequency f2 of the read clock pulse, so that a desired time axis compression/expansion processing with the frequency of the sound signal unchanged can be achieved. In this case, f1&gt;f2 is established on the occasion of high speed reproduction. Accordingly, it would be appreciated that by selecting of number of data storing regions (the sample number) in the random access memory 95 to be N, the samples of N(1- f2/f1) is disregarded without being read at each cycle in N samples as read in these storing regions, with the result that the frequency of the residual data is as high as (f2/f1) times. Furthermore, since f1&lt;f2 on the occasion of low speed reproduction, likewise the samples of the number N(1-f1/f2) are repeatedly read out and the frequency of them becomes as high as (f2/f1) times.
Meanwhile, the spectrum structure of the sampled data time sequence as sampled in accordance with the write clock of the frequency f1 has approximately the same spectrum distribution as that of the input signal at both sides an integer number times the sampling frequency f1 as shown in FIG. 4A. Accordingly, when the frequency band restriction of the input signal is incomplete, an overlapping occurs between the spectrum of the input signal and the spectrum of the integer times the sampling frequency (1), as shown by the dotted line in FIG. 4A. Such overlapping which once occurred through such sampling is unseparable and distortion referred to as a folded noise occurs due to the above described overlapping. The low-pass filter 7 shown in FIG. 3 is provided for the purpose of eliminating this folded noise and the same must have a characteristic of sufficient attenuation at the frequency ratio (f1/2).
Meanwhile, the input signal has a frequency width changeable as a function of the reproduction speed ratio as shown in FIGS. 4B and 4C depending on the high speed reproduction or the low speed reproduction. Simultaneously the frequency f1 of the sampling clock is also changeable. Accordingly, in order to completely eliminate the folded noise in the case where the spectrum structure is changeable, it is necessary to select the frequency f1 of the sampling clock to be sufficiently large or to change the frequency width of the low-pass filter 7 at the input side in association with the reproduction speed ratio (Vr/Vp). However, generally, when the frequency f1 of the sampling clock is increased, the storage capacity (N) at the random access memory 95 need be accordingly increased. Therefore, this is much less utilized from the standpoint of cost and more often the characteristic of the low-pass filter 7 at the input side is normally changed. Therefore, a voltage control variable attenuation characteristic filter exhibiting an attenuation characteristic changeable as a function of a speed control voltage is utilized as the low-pass filter 7 shown in FIG. 3.
Although the time axis compressing/expanding circuit shown in FIG. 3 was structured such that a sound signal as reproduced at low speed or high speed and received as an input signal is converted to a signal of the same frequency as that of the original signal, an occasion could arise in which it is desired such as in the case of an electronic musical instrument that the frequency of a musical signal is converted to a different pitch. Even in such a case, the inputted musical signal is sampled as a function of the sampling pulse and the sampled data is stored, whereupon the data is read as a function of the read clock pulse. However, in the case where the pitch of the output signal is to be thus changed, the frequency width of the inputted musical signal is fixed while the frequency width of the outputted musical signal is variable and therefore the time axis compressing/expanding circuit shown in FIG. 3 as such can not be utilized. More specifically, in applying the musical signal as low speed reproduced or high speed reproduced, it is necessary to restrict the frequency width of the input signal; however, in the case where the pitch of the musical signal to be outputted is to be changed, it is necessary to restrict the frequency width of the output signal or to increase the frequency f2 of the read clock pulse.